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MULTIPLEXED_CLOCK_DlSPLAY

2017-01-06 12:03  
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MULTIPLEXED_CLOCK_DlSPLAY
Multiplexed display suitable for LED readouts is provided by circuit using TTL counters to count 60-Hz Iine.When count reaches 10 o'clock, flip-flop M is set on evely cycle. Gate G3 then detects when time goes to 13 o'clock, and clears shift register.Carry flip-flop remains set, so 1 is loaded into hours digit to accomplish transition from 12:59:59 to 1:00:00. Seven-segment decoder driver Iooks at shift register output and drives segment lines of LED Leading hours digit is blanked,using RBI input on 9317.-G.Smith,Novel clock Circuit Provides Multiplexed Display,EDN Magazine.Sept 1,1972,p 50-51.