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TIDE_CLOCK

2017-01-06 21:11  
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TIDE_CLOCK
Circuit shuts off electric clock of any type for 5 s out of every 144 s, to give loss of 50 min in 24 h as required for making high tides conform to clock readings. Regulated 5-V supply shown drives TTL 7492 frequency divider that reduces 60-Hz line frequency by factor of 12 to 5 Hz. 7490 divides this by 10 to give 0.5 Hz.Two more 7492s divide by 12 and 12 to give symmetrical pulses with period of 288s. Second 7490 divides 2-s pulse down to 10 s. Counter IC4 inhibits 5-s counter by feeding low output into one gate of IC7 hex inverter. When IC4 counts up to 144 s, its output goes high and resets IC6 to low for start of 5-s low period of that counter.Article gives timing waveforms. Switching tran-sistor is used to control relay that opens clock circuit. Set tide clock at 12:00 for high tide at location of use .and t will be 12:00 at high tide thereafter.Low tide will then be at 6:00.-J.F.Crowhter Time and -Digitally,73 magazine,Aug.1978,p 156-157