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Output signal and transmitting bus monitor circuit

2015-01-21 20:36  
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A bus monitor circuit that produces a bus monitor output signal on a bus transmitting data between a master and a slave includes an access information/write dataFIFO and a read data FIFO.When an attribute of the access information stored at a header of the access information/write data FIFO indicates a write access, it directly outputs a bus monitor output signal indicating access information accompanied with the corresponding write data which is transmitted in the same cycle.Getting microprocessor designs to work is notoriously difficult when both the software and hardware are new. The usual approach is to run test routines that address memory and I/O, but do not rely on their correct functioning. However, miswiring in any part of the circuit usually leads to a misleading jumble of signals that might require a logic analyzer to interpret. This simple circuit will trace the program execution and help point to the problems. Although the circuit shows connections for a Z-80, the circuit can very easily be adapted for any 8-bit microprocessor or with additional circuitry for CPUs of any bus width. The circuit consists of a 5-byte hexadecimal display and comparator, which are wired to a 40-pin IC test clip. The test clip sits over the microprocessor (in this case a Z-80), where it gets power and all the required signals. The address bus and control lines are fed to the comparator, where (by means of switches) a trigger condition can be set. Following the trigger, the next 5 occurrences of either RD or WR will latch the contents of the data bus into the 5 hex displays, each in turn. To trace longer portions of a program the address switches can be incremented to follow the execution path.A digital bus monitor used to observe data on a bus connecting multiple integrated circuits comprises a memory buffer,bypass register,test port,and output control circuits controlled by an event qualifying module (EQM).In response to a matching condition the EQM may perform a variety of tests on incoming data while the integrated circuits continue to operate at speed. A plurality of digital bus monitors  may be cascaded for observation and test of variable width data buses and variable width signature analysis.


Z-80 Bus Monitor/Debugger