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PHASE_LOCKED_20_MHz_OSCILLATOR

2016-08-19 06:06  
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PHASE_LOCKED_20_MHz_OSCILLATOR
This circuit produces a 20-MHz clock phase locked to a 10-MHz dock present in the Apple MAC II.To generate the 20-MHz signal, the circuit produces a 25 ns negative-going pulse delayed 50 ns from the falling edge of the 10-MHz Nubus clock input at point E. NORing that pulse with the Nubus clock produces the 20-MHz clock at point G. Applying the 25-ms pulse to the set input of an S/R flip-flop and the Nubus clock to the reset input results in a 10-MHz square wave at F.